HIGH-SPEED SERDES DESIGN ENGINEER
Ayar Labs is commercializing breakthroughs in optical communications that will bring 10x improvements to data center communication bandwidths and energy efficiency by building optical systems in high-volume commercial CMOS chips. We are a small team that is motivated by a mission to get optics inside all electronics, replacing electricity with light, and bringing breakthrough improvements in performance and energy efficiency to computing. We will be growing quickly and we expect every member of our team to grow with us and to be comfortable with both hands-on engineering work and with leading a team or project.
Responsible for design, layout, verification, and characterization of high-speed transceiver elements, TIAs, limiting amplifiers, I/Os, equalizers, high-speed CML, and other SerDes/CDR/PLL building blocks at data rates of 10Gb/s and higher. You will work as a part of a small IC design team in a dynamic startup environment, taking an active role in design reviews, contributing to product definition, proposing and evaluating technical solutions, writing design specifications and test requirement documents, etc. The ideal candidate is a hands-on self-starter who is able to develop design specifications based on input from colleagues, customers, and industry and who can effectively manage his or her own time to take projects to completion with limited supervision and guidance.
To apply, please email your cover letter and CV to firstname.lastname@example.org, with the subject line: “High-Speed SerDes Engineer Application”