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Principal/Senior RF IC Design Engineer

Job Description

  • Candidate will participate as a team player in development and design of products using RFIC design skills and techniques including but not limited to designing RFIC modules in advanced process nodes.
  • Candidate will be acting as a key contributor to the design, implementation and verification for a range of low power wireless chips and will be contributing to chip level architectures.
  • Responsible for the schematic entry, simulation, and verification of relevant Analog/RF circuits and subsystems.
  • Responsible for documentation and contribute to the post-silicon validation and debugging.
  • Working closely with the system architect and IC layout team throughout the design cycle.
  • Working on transistor modeling for RF design, RF board and module design, and lab characterizations.
  • Job Requirements

    • Expertise and experience in RF design is highly desirable
    • Solid understanding of basic RFIC/Analog circuit requirements including noise, linearity, bandwidth and loop stability, both small signal and large signal.
    • Hands-on experience with both time and frequency domain circuit simulation using EDA tools.
    • Experience in EDA design, simulation and layout environment
    • Layout experience and good layout practice, both high frequency and high precision
    • Knowledge of state of the art technologies and deep sub-micron processes.
    • Knowledge in behavioral modeling is a plus.
    • Qualifications

      • BSEE/Ph.D. with minimum 3+ years of industry experience in RFIC design; Fresh PhD graduates specializing in high frequency RFIC design will also be considered.
      • Excellent communications skills, written and spoken.
      • Ability to work independently as well as a key team player.
      • Others

        • Staying or willing to relocate to Singapore.

        • Interested candidate, please send your resume to albert.chai@cloptech.com and we will contact to you soon.

          Company Overview

          CLOP TECHNOLOGIES PTE LTD is spin-off from A*STAR Singapore R&D, established to provide world-class compelling and affordable solutions to improve connectivity and quality of life for everyone.

          We are expanding CLOPTech family and looking for aspiring engineers to join our team. You will be part of a dynamic team to design and/or verify advanced SoC digital, analog, and RFIC for wireless communication system.

          There are wide exposures to various cross-functional roles and opportunities. Senior leadership roles are available for experienced candidates.

          As a start-up, you will have the opportunity to walk through the journey of building and growing with CLOPTech in a most fulfilling, inspiring, challenging, and rewarding ways.

          If you have a strong passion and drive to build your own business and company, and looking for a more exciting and fulfilling career, please do not hesitate to contact us to learn more.


           
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          Microfabrication Process Engineer

          Open Position

          Based at the Micro and Nanofabrication Laboratory at INRS in Varennes, QC, Canada, the successful candidate will work closely with our academic and industrial collaborators to develop and improve custom microfabrication processes. The candidate will also have to travel to other facilities in the Montreal and Eastern Township area, and to AEPONYX’s offices in Montreal.

          Assignments

          Develop microfabrication process flows and processes in academic microelectronic foundries.
          Troubleshoot fabrication issues with prototypes.
          Work with industrial foundries to plan the transfer to mass production of the developed processes.
          Any other task associated to the development of the start-up.

          Background

          The ideal candidate has a master’s or PhD degree with experience in the fabrication of MEMS and/or integrated optical devices. She or he must be able to define fabrication process flows and to troubleshoot fabrication issues. The candidate must also be able to work in a team to accelerate process development. Knowledge of the following processes is required:
          • Reactive Ion Etching (RIE) of silicon and CMOS compatible materials
          • Photolithography
          • Plasma Enhanced Chemical Vapor Deposition (PECVD)
          • Scanning Electron microscopy (SEM)
          • Sputtering

          • Experience with the following is an asset:
            • Electron beam lithography
            • Wafer bonding
            • Low-pressure Chemical Vapor Deposition (LPCVD)
            • Mechanical, optical and electrical material characterization (e.g. stress, refractive index, surface profile, conductivity, etc).
            • Characterization of optical and/or MEMS devices (e.g. propagation losses, spectral response, actuation voltage, frequency response, etc.)

            • The candidate must be able to communicate effectively in English, both orally and in writing. The knowledge of French is an asset.

              Entry Date

              As soon as possible.

              Looking for a fulfilling job and an opportunity to develop a new way to fabricate optical chips?
              We want you in our dynamic team!

              Company Overview

              Based in Montreal, Quebec, Canada, AEPONYX is the market leader in MEMS-based Silicon Photonics. With our patented technologies, combining planar Micro-Electro-Mechanical-Systems (MEMS) and Silicon Photonics, we are building the fastest, most affordable and smallest micro optical switches for use in disaggregated switching systems and tunable transceivers. Join the dynamic fabless semiconductor start-up to design and manufacture the optical chips needed for the next generation of fiber optic access to the cloud. compared with other emerging memory technologies.


               
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              Memory Design Engineer

              Description

              We are looking for a memory design engineer to develop low-power, high-performance memory circuitry. Some of the responsibilities include:
              • Work on advanced memory technologies and circuit design
              • Be actively involved in championing the technologies to potential partners or customers

              • We are looking for candidates with the following capabilities:
                • BS, MS, PhD in EE (advanced degree preferred)
                • Proficient at VLSI design
                • Experience in CMOS analog and digital circuit design
                • Solid understanding of transistor-level circuits and device-level physics
                • Experience in LabVIEW is desirable

                • In addition, candidate needs to:
                  • Be a self-starter and be able to work with little to no supervision
                  • Be flexible in a very fluid startup environment
                  • Company Overview

                    Zeno Semiconductor, Inc. is a start-up company developing a breakthrough memory technology. Zeno memory technology provides more than 80% cell size reduction compared with current mainstream memories. In addition, our technologies utilize mainstream CMOS process technology, which is key in lowering manufacturing cost with lowering risk of adoption compared with other emerging memory technologies.

                    For further information, please contact us at hr@zenosemi.com, along with your resume and transcript.


                     
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                    Layout Design Engineer

                    Description

                    We are looking for a layout design engineer to implement low-power, high-performance memory circuitry. Some of the responsibilities include:
                    • Work on advanced memory technologies and layout design

                    • We are looking for candidates with the following background:
                      • BS in EE (advanced degree preferred)
                      • Experience in FinFET technology node
                      • Experience in analog circuit layout design

                      • In addition, candidate needs to:
                        • Be a self-starter and be able to work with little to no supervision
                        • Be flexible in a very fluid startup environment
                        • Company Overview

                          Zeno Semiconductor, Inc. is a start-up company developing a breakthrough memory technology. Zeno memory technology provides more than 80% cell size reduction compared with current mainstream memories. In addition, our technologies utilize mainstream CMOS process technology, which is key in lowering manufacturing cost with lowering risk of adoption compared with other emerging memory technologies.

                          For further information, please contact us at hr@zenosemi.com, along with your resume and transcript.


                           

                          HIGH-SPEED SERDES DESIGN ENGINEER

                          The Company

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                          Ayar Labs is commercializing breakthroughs in optical communications that will bring 10x improvements to data center communication bandwidths and energy efficiency by building optical systems in high-volume commercial CMOS chips. We are a small team that is motivated by a mission to get optics inside all electronics, replacing electricity with light, and bringing breakthrough improvements in performance and energy efficiency to computing. We will be growing quickly and we expect every member of our team to grow with us and to be comfortable with both hands-on engineering work and with leading a team or project.

                          General Description

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                          Responsible for design, layout, verification, and characterization of high-speed transceiver elements, TIAs, limiting amplifiers, I/Os, equalizers, high-speed CML, and other SerDes/CDR/PLL building blocks at data rates of 10Gb/s and higher. You will work as a part of a small IC design team in a dynamic startup environment, taking an active role in design reviews, contributing to product definition, proposing and evaluating technical solutions, writing design specifications and test requirement documents, etc. The ideal candidate is a hands-on self-starter who is able to develop design specifications based on input from colleagues, customers, and industry and who can effectively manage his or her own time to take projects to completion with limited supervision and guidance.

                          Desired Qualifications

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                        • 5+ years of working/research experience in high-speed CMOS SerDes design (CTLEs, TIAs, PLLs, DFEs, etc.), minimum M.S in Electrical Engineering, Ph.D. preferred
                        • Have experience designing in advanced CMOS (65nm or below) at data rates of at least 10Gb/s and/or RF circuits operating at 5GHz or above
                        • Proficient with Cadence design environment and mixed-signal simulation (ADE, Layout, AMS), mixed-signal simulation (AMS), EM simulation (such as EMX)
                        • Good understanding of high-speed layout considerations, such as parasitics, crosstalk isolation, supply and bias distribution, etc.
                        • Working knowledge of theoretical and practical aspects of electro-magnetic structures including transmission lines, spiral inductors, resonant circuits, etc. (HFSS experience is a plus)
                        • Experience with precision analog and mixed-signal circuits is a plus
                        • Able to assume responsibility for a variety of technical tasks and to work independently
                        • Able to be hands-on at all levels of design, with the ability to verify, test, and characterize own designs
                        • Good communication and presentation skills
                        • To apply, please email your cover letter and CV to info@ayarlabs.com, with the subject line: “High-Speed SerDes Engineer Application”


                           
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                          OSCP is looking for a driven MS.c or Ph.D. graduate (or Ph.D. candidate) in Electrical and Computer Engineering, Physics or related fields to launch a deep technology start-up.

                          What we do at OSCP

                          Founded in 2014, OSCP is developing high performance fully integrated optical motion sensors (accelerometers and gyroscopes).

                          What you will do at OSCP

                          • Be on track to become the CTO in the company you are building
                          • Apply your theoretical knowledge to solve the problems
                          • Learn the steps to becoming a successful technology entrepreneur
                          • Assemble and lead a world-class team
                          • Apply for government grants
                          • Advance the state of practice in your field by filing patents and publishing technical papers
                          • Jumpstart your career in industry
                          • Deep engagement with our partners and clients by participating in meetings, sharing ideas and establishing relationships
                          • What you need to get this role

                          • Leadership and strong communication skills
                          • Demonstrated entrepreneurial drive
                          • Sense of initiative and fresh ideas
                          • Willingness to commit and take risks
                          • Tangible technical achievements, which might include relevant work experience, patents, successful projects or publications
                          • Deep knowledge in micro-optics especially in the field of micro-optical sensors
                          • Experience in motion sensors and MEMS is a plus
                          • Industry experience is preferred
                          • Minimum Master degree, Ph.D is preferred

                          • Please send your resume to: info@onesiliconchipphotonics.com