ASIC/FPGA Design Engineer (DSP)
Company: Eridan
About eridan
Eridan is a rapidly-growing startup building 5G radios to enable abundant wireless connectivity everywhere in the world. Our MIRACLE transceiver is based on a patent-protected switching architecture that decreases the amount of power required to transmit a gigabit of data by 5-10x.
We’re a small team with big aspirations to put an Eridan transceiver in every wireless device in the world, and we believe in the power of teamwork and focus to enable outsized results. Our Mountain View office is a 10-minute walk from the Caltrain, and we provide a casual work environment, and lots of room for growth.
The Job
Eridan is currently building out our digital design team. As an ASIC/FPGA Design Engineer (DSP), You will focus on digital signal processing (DSP) and digital communication system blocks as part of complex ASIC and FPGA SoC products and will participate in numerous exciting and challenging activities in a fast-moving design environment.
A successful ASIC/FPGA Design Engineer (DSP), at Eridan will have strong technical and analytical skills and be comfortable working and solving problems independently as well as collaboratively within a team. We look for engineers with initiative, persistence, curiosity, and good communication skills.
In this role you will:
Design, implement and integrate 5G Protocol Stack layers from source models, along with block level micro-architecture design, RTL coding, simulation, and documentation.
Take responsibility for area/power optimization and design trade-off analysis, as well as block and chip level synthesis and timing closure.
Provide chip bring-up and silicon validation support.
Translate models written in either C/C++, MATLAB, or Python
Script and automate workflows in Python, Tcl, and GNU Make
Qualities of a successful candidate:
Bachelor’s degree in electrical engineering, computer engineering, or other engineering discipline
2+ years of experience working with ASIC, computer, and embedded system architecture (internship and research experience qualifies)
2+ years of experience with Vivado for FPGA development
2+ years of experience in SystemVerilog, Verilog, or VHDL RTL design
2+ years of experience in scripting and programming languages in two or more of the following: MATLAB, Python, C/C++, Perl, Tcl, Make, Bash
Familiarity with a Continuous Integration Tool
Preferred capabilities/Nice to have:
Master’s degree in electrical engineering or computer engineering
Experience with design verification (DV) is a plus
2+ years of experience in designing DSP or digital communication system datapath blocks (e.g. filters, transforms, PHY blocks, loops, FEC, etc.)
Theoretical knowledge of basic concepts in DSP and digital communication systems
Knowledge of SystemVerilog, Verilog, and/or VHDL
Experience in designing datapath and control RTL blocks
Experience in designing signal processing and digital communications circuits
Perks of working at Eridan
Opportunity to make a significant impact
Flexible hybrid remote work policy
Opportunities to learn, develop, and advance
Working with smart, passionate, and helpful co-workers
Pre-IPO equity
Generous PTO
401K with automatic matching
Health, Vision and Dental insurance
Lunches provided for those in the office
Eridan is an equal opportunity employer. We value and celebrate diversity and are committed to creating an inclusive environment for all employees. Qualified applicants will be considered for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
COVID-19 Note
At Eridan we value the health and safety of our employees. In order to ensure a safe environment, we require that all employees are fully vaccinated.
Please contact Susy Kamin for more information.